Photoresist Strip/Surface Preparation

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As interconnect structures migrate toward smaller feature sizes, issues involving surface preparation become one of the primary barriers to the extendibility and reproducibility of deposition processes. Residual contamination from improperly prepared surfaces can affect the deposition and adhesion of subsequent metal or dielectric layers. In addition, the transition to low-k dielectrics is driving a complete change in surface preparation technology, since most current surface preparation processes are incompatible with these low-k materials. As a result, surface preparation technology is becoming a critical device performance enabler in sub-90 nm devices.

GxT®/G400®/G3D™

The GxT, G400, and G3D are photoresist strip systems based on the production-proven, market-leading GAMMA platform. Targeted for bulk strip and high-dose implant strip (HDIS) applications, primarily in large DRAM and flash memory fabs, the G400 is the industry's most productive ashing system. Enhanced source technology combined with faster wafer heating provides the G400 with throughputs of over 400 wph for bulk strip applications, and 300 wph for implant strip applications. The GxT, in turn, is designed for critical logic device manufacturing process steps that demand low silicon loss and ultra-low defectivity. The GxT's multi-station sequential processing (MSSP) architecture provides multiple process stations where both temperature and chemistry may be controlled, allowing higher-temperature bulk strip, lower-temperature HDIS and advanced cleaning processes all on the same platform. A version of the GxT, the G3D, is also available for advanced wafer-level packaging applications.

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GxT/G400/G3D